The parallel-to-serial converter as recited in claim 2, wherein the parallel-to-serial conversion unit selects the plurality of data as valid data during enable periods of the clock signals used in the parallel-to-serial conversion unit.Ĥ.
The parallel-to-serial converter as recited in claim 1, wherein the data input unit receives the plurality of data as valid data during enable periods of the clock signals used in the data input unit.ģ.
What is a parallel to serial converter drivers#
A parallel-to-serial converter, comprising: a data input unit having a plurality of input blocks configured to receive a plurality of parallel data by using a plurality of clock signals having different phases and a parallel-to-serial conversion unit having a plurality of first drivers configured to sequentially select and output an output signal of the data input unit by using a plurality of clock signals, wherein each of the plurality of clock signals inputted to the plurality of input blocks has a predetermined constant phase difference from each of the plurality of clock signals inputted to the plurality of first drivers corresponding to the plurality of input blocks.Ģ.
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